1. Field of the Invention
This invention relates to Metal Oxide Semiconductor Field Effect Transistor (MOST) circuits, especially those compatible with monolithic integrated circuits and more particularly cascoded circuits configured for the sourcing of constant currents to other circuits present upon the monolithic integrated circuits.
2. Description of Related Art
The cascode current mirror has been used for many years as an active load for an amplifier or as a current source for differentially connected pairs of transistors in a operational amplifier (Op Amp).
FIG. 1a shows a schematic representations of an ideal current mirror. The output current i.sub.out is proportional to the input current i.sub.in by a factor B, therefore: EQU i.sub.out =i.sub.in B
The most simple version of a current mirror is shown in FIG. 1b. It consists of two MOST's M.sub.1 and M.sub.2. MOST M.sub.1 is connected as MOS diode and is driven by the current source i.sub.in. The other MOST M.sub.2 provides the output current i.sub.out. Since the voltage developed from the gates to the sources of the two MOST's M.sub.1 and M.sub.2 are the same then the ratios of the currents is: ##EQU1## where (w/l) is the ratio of the width of the gate of the MOST to the length of the gate of the MOST.
By choosing the ratio appropriately, any arbitrary value of output current can be selected with precision.
The requirements for an ideal current source are the following:
The width to length ratio w/l of the two transistors precisely sets the current ratio. PA1 The output impedance is very high so that the output current is independent of the output voltage. In FIG. 1b the output resistance of the circuit is r.sub.o2 (the output resistance of the MOST M.sub.2). PA1 The value of the input resistance is very high. PA1 The minimum output voltage V.sub.out for which the output acts as a current source is low. PA1 r.sub.o4 is the output resistance of M.sub.4, PA1 g.sub.m4 is the transconductance of M.sub.4, and PA1 r.sub.o2 is the output resistance of M.sub.2. PA1 .beta..sub.1 is the transconductance parameter of M.sub.1 PA1 .nu..sub.gs is the voltage developed from the gate to the source of M.sub.1 PA1 .nu..sub.t is the threshold voltage of a MOST. PA1 .beta..sub.5 is the transconductance parameter of M.sub.5 PA1 .nu..sub.g1 is the voltage developed from the gate to the source of M.sub.1, PA1 .nu..sub.d1 is the voltage developed from the drain to the source of M.sub.1, PA1 .nu..sub.g3 is the voltage developed from the gate to the source of M.sub.3, PA1 .nu..sub.g4 is the voltage developed from the gate to the source of M.sub.4, PA1 .nu..sub.g5 is the voltage developed from the gate to the source of M.sub.5, PA1 .nu..sub.d5 is the voltages developed from the drain to the source of M.sub.5. PA1 .nu..sub.g6 is the voltage developed from the gate to the source of M.sub.6. PA1 .beta..sub.4 is the transconductance parameter for M.sub.4.
FIG. 2 shows a cascoded current mirror. Two MOST's M.sub.1 and M.sub.2 determine the current ratio by the following: ##EQU2## where (w/l) is the ratio of the width of the gate of the MOST to the length of the gate of the MOST.
The output resistance r.sub.out of the circuit is increased to: EQU r.sub.out =r.sub.o4 (1+g.sub.m4 r.sub.o2)
where
and the output capacitance of the circuit is reduced by the factor g.sub.m4 r.sub.o2, thus increasing the output impedance.
The minimum output voltage V.sub.out of the circuit in FIG. 2 is higher since the minimum output voltage will be the sum of the gate to source voltage of M.sub.1 and the drain to source voltage of M.sub.4, which is always larger than the gate threshold voltage V.sub.T. This high minimum V.sub.out of M.sub.4 will seriously reduce the range of output signal swing, If V.sub.out is less than .nu..sub.t -2.DELTA..nu..sub.t, either M.sub.4 or M.sub.2 will fall out of the saturation region with very low output resistance r.sub.o4 or r.sub.o2. Reducing this minimum is necessary to increase the output swing.
FIG. 3 illustrates a circuit where the minimum V.sub.out is kept low by the MOST M.sub.4 and the output resistance is kept high by the cascoded MOST M.sub.6. The output voltage now becomes the sum of the drain to source saturation voltages (V.sub.ds sat) for MOST M.sub.5 and M.sub.6. The minimum of this voltage will be lower than the V.sub.out in FIG. 2 by the voltage drop through V.sub.gs of M.sub.4. However, this voltage will not be too low if the MOST's M.sub.5 and M.sub.6 are relatively very large or they are operated very close to weak inversion. Operating in weak inversion will degrade the output current and the current mirror fails. But, large M.sub.5 and M.sub.6 will take a large area and is not recommended in integrated circuits.
It is difficult in practice to design the transistors such that the drain to source voltages (V.sub.DS) for M.sub.1 and M.sub.5 are equal which will result in an error term for the value of i.sub.out. That is, if ##EQU3## where: i.sub.in is the magnitude of the current source
Then: ##EQU4## where i.sub.out is the output of the current mirror of FIG. 3
Further more if: ##EQU5## then: EQU .nu..sub.g1 =.nu..sub.d1 =.DELTA..nu..sub.t +.nu..sub.t EQU .nu..sub.g3 =.nu..sub.g4 =2.DELTA..nu..sub.t +.nu..sub.t EQU .nu..sub.g5 =.DELTA..nu..sub.t +.nu..sub.t
where
so a minimum: EQU .nu..sub.d5 .DELTA..nu..sub.t
where
Therefore: EQU .nu..sub.g6 =.nu..sub.g4 -.nu..sub.t -.DELTA..nu..sub.t =.nu..sub.t -.DELTA..nu..sub.t
where
Then: ##EQU6## Additionally to keep M.sub.6 in saturation with proper i.sub.out, the gate width to gate length ratio (w/l) of M.sub.4 and M.sub.6 is very large. To keep reasonable i.sub.out the value of .beta. for M.sub.4 and M.sub.6 needs to be large. That is: ##EQU7## where .beta..sub.1 is the transconductance parameter for M.sub.1,
Therefore: ##EQU8## Thus ##EQU9## must be small and .beta..sub.6 has to be large to have ##EQU10## so that ##EQU11## as in the ideal current source as shown in FIG. 1b.
It should be noted that if ##EQU12## is not large enough, then i.sub.out will be seriously degraded, such as ##EQU13## and the current mirror will fail.
U.S. Pat. No. 4,550,291 (Millway, et al.) teaches a technique for the design of an amplifier circuit using cascode circuitry to provide noise free operation.
U.S. Pat. No. 5,897,596 (Hughes, et al.) describes a MOS Transistor circuit using cascode current sources to provide processing for sampled analog signals.